Master-Slave Match Line Design for Low-Power Content-Addressable Memory

被引:14
|
作者
Chang, Yen-Jen [1 ]
Wu, Tung-Chi [1 ]
机构
[1] Natl Chung Hsing Univ, Dept Comp Sci & Engn, Taichung 402, Taiwan
关键词
Charge refill minimization; content-addressable memory (CAM); low-power; master-slave architecture; match line (ML); TCAM;
D O I
10.1109/TVLSI.2014.2345512
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Content-addressable memory (CAM) is a hardware storage commonly used in the fast lookup applications. However, the parallel comparison feature costs the CAM memory large power consumption. In this paper, we propose a new CAM word architecture, called master-slave match line (MSML) design, which aims to combine the master-slave architecture and charge refill minimization technique to reduce the CAM power dissipated in the match lines (MLs). Unlike the conventional design, where only one single ML is used, our design uses one master-ML (MML) and several slave-MLs (SMLs) to perform the search operation. By sharing the MML charge with only the mismatched SML, our design can minimize the MML charge refill swing, such that the ML power consumption can be reduced effectively. Theoretically, the ML power saving is at least 50%, which is independent of the search pattern and match case. Compared with the conventional NOR-type CAM design, the simulation results show that the MSML design with the best configuration can reduce the ML energy consumption by range 7%-57%, which increases with the word size. In addition, we further propose a modified CAM cell to facilitate the MSML match performance, i.e., MSMLhp design, which can even result in 28% and 69% energy-delay product improvement compared with the original MSML and traditional CAM designs in the 128-bit word size case.
引用
收藏
页码:1740 / 1749
页数:10
相关论文
共 50 条
  • [21] A low-power content-addressable memory (CAM) using pipelined hierarchical search scheme
    Pagiamtzis, K
    Sheikholeslami, A
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2004, 39 (09) : 1512 - 1519
  • [22] A Low-Power Content-Addressable Memory (CAM) using Pipe lined Search Scheme
    Song, Yibo
    Yao, Zheng
    Xiong, Xingguo
    TECHNOLOGICAL DEVELOPMENTS IN NETWORKING, EDUCATION AND AUTOMATION, 2010, : 405 - 410
  • [23] Use of selective precharge for low-power content-addressable memories
    Zukowski, CA
    Wang, SY
    ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGE, 1997, : 1788 - 1791
  • [24] Design for low-power, low-cost, and high-reliability precomputation-based content-addressable memory
    Lin, CS
    Chang, JC
    Liu, BD
    APCCAS 2002: ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 2, PROCEEDINGS, 2002, : 319 - 324
  • [25] Critical race-free low-power NAND match line content addressable memory tagged cache memory
    Chen, Chaudhary T. -H.
    Sheerin, F.
    Clark, L. T.
    IET COMPUTERS AND DIGITAL TECHNIQUES, 2008, 2 (01): : 40 - 44
  • [26] Pipelined match-lines and hierarchical search-lines for low-power content-addressable memories
    Pagiamtzis, K
    Sheikholeslami, A
    PROCEEDINGS OF THE IEEE 2003 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2003, : 383 - 386
  • [27] Low-power high-performance NAND match line content addressable memories
    Chaudhary, Vikas
    Clark, Lawrence T.
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2006, 14 (08) : 895 - 905
  • [28] Match line sense amplifiers with positive feedback for low-power content addressable memories
    Mohan, N.
    Fung, W.
    Wright, D.
    Sachdev, M.
    PROCEEDINGS OF THE IEEE 2006 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2006, : 297 - 300
  • [29] A low-power technique based on charge injection and current-saving methods for match-line sensing in Content-Addressable Memories
    Zhang, Jianwei
    Ye, Yizheng
    Liu, Binda
    2006 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, 2006, : 1293 - +
  • [30] A Parallel-Segmented Architecture for Low Power Content-Addressable Memory
    Ng, Ka Fai
    Hsu, Kenneth W.
    Kudithipudi, Dhireesha
    IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS, 2009, : 219 - 222