Techniques for Improving System-in-Package Integration and Electrical Performance

被引:0
|
作者
Huang, Shaowu [1 ]
Delacruz, Javi [1 ]
机构
[1] Xperi Corp, 3025 Orchard Pkwy, San Jose, CA 95134 USA
关键词
SIP; RF; EMI; Signal Integrity; Power Integrity; Interconnect; BVA;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, we use bond-via-arr ayn4 (BVA) wirebonds to achieve compact vertical integration and improve the electrical performance of system-in-package (SiP) modules. Two improvements are presented. First, BVA wirebonds are utilized to integrate passive or active components vertically with other components. This significantly reduces the horizontal footprint of the entire SiP. In terms of electrical performance, this vertical integration provides much lower parasitic inductance than conventional 2D horizontal integration designs because of shorter interconnections. For example, the proposed technology can significantly reduce power delivery network (PDN) impedance compared to a conventional design. Second, we propose BVA wirebond wires as an electromagnetic interference (EMI) shield between different domains within the SiP. This provides a lower cost solution for EMI shielding, particularly when regions within a package need to be shielded.
引用
收藏
页数:6
相关论文
共 50 条
  • [41] System-in-package synthesizer for PCS/DCS application
    Bagger, Reza
    Hahn, Tobias
    Wallace, Richard
    Edevarn, Lars
    2007 EUROPEAN MICROWAVE CONFERENCE, VOLS 1-4, 2007, : 1318 - 1321
  • [42] SIGNAL INTEGRITY ANALYSIS FOR RF SYSTEM-IN-PACKAGE
    Chen, Jeff
    Li, Weiping
    Ling, Feng
    PROCEEDINGS OF THE ASME PACIFIC RIM TECHNICAL CONFERENCE AND EXHIBITION ON PACKAGING AND INTEGRATION OF ELECTRONIC AND PHOTONIC SYSTEMS, MEMS AND NEMS 2011, VOL 1, 2012, : 671 - +
  • [43] System-In-Package Design Approach Promotes PORTABILITY
    Moncoqut, Diana
    MICROWAVES & RF, 2010, 49 (07) : S1 - S3
  • [44] Neksus: An Interconnect for Heterogeneous System-In-Package Architectures
    Goyal, Vidushi
    Wang, Xiaowei
    Bertacco, Valeria
    Das, Reetuparna
    2020 IEEE 34TH INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM IPDPS 2020, 2020, : 12 - 21
  • [45] Modeling melting solder in system-in-package assembly
    Zhao, J. F.
    Wang, J. F.
    Yang, C.
    Advances in Electronic Packaging 2005, Pts A-C, 2005, : 1455 - 1458
  • [46] Challenges and opportunities in System-in-Package (SiP) business
    Sham, M. L.
    Chen, Y. C.
    Leung, T. W.
    Lin, J. R.
    Chung, T.
    ICEPT: 2006 7TH INTERNATIONAL CONFERENCE ON ELECTRONICS PACKAGING TECHNOLOGY, PROCEEDINGS, 2006, : 26 - +
  • [47] Inkjet printed System-in-Package design and manufacturing
    Miettinen, Jani
    Pekkanen, Ville
    Kaija, Kimmo
    Mansikkamaki, Pauliina
    Mantysalo, Juha
    Mantysalo, Matti
    Niittynen, Juha
    Pekkanen, Jussi
    Saviauk, Taavi
    Ronkka, Risto
    MICROELECTRONICS JOURNAL, 2008, 39 (12) : 1740 - 1750
  • [48] Packaging technology trends and challenges for system-in-package
    Dohya, A
    IEICE TRANSACTIONS ON ELECTRONICS, 2001, E84C (12) : 1756 - 1762
  • [49] System-in-package synthesizer for PCS/DCS application
    Bagger, Reza
    Hahn, Tobias
    Wallace, Richard
    Edevarn, Lars
    2007 EUROPEAN MICROWAVE INTEGRATED CIRCUITS CONFERENCE, VOLS 1 AND 2, 2007, : 595 - 598
  • [50] System-in-package integration of passives using 3D through-silicon vias
    Roozeboom, F.
    Dekkers, W.
    Lamy, Y.
    Klootwijk, J. H.
    van Grunsven, E.
    Kim, H. -D.
    SOLID STATE TECHNOLOGY, 2008, 51 (05) : 38 - +