Revisiting FPGA Implementation of Montgomery Multiplier in Redundant Number System for Efficient ECG Applications in GF(p)

被引：5

作者：

Roy, Debapriya Basu ^{[1
]}

Mukhopadhyay, Debdeep ^{[1
]}

机构：

[1] Indian Inst Technol Kharagpur, Dept Comp Sci & Engn, Kharagpur, W Bengal, India

来源：

2018 28TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL) | 2018年

关键词：

Montgomery multiplier; Redundant number system; ECC;

D O I：

10.1109/FPL.2018.00061

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The fast implementations of ECC in GF(p) are generally implemented using specialized prime field, and henceforth, they are dependent on the structure of the prime. But, these implementations cannot be ported to generic curves which do not support such prime structures. Such generic curves are often used in various crypto-applications like pairing and post quantum secure supersingular isogeny based key exchange. In those cases, modular multiplication is executed through Montgomery multiplier which is slower compared to modular multiplication using specialized primes. This work aims to reduce the speed gap between Montgomery multiplication and modular multiplication in specialized prime field by presenting an efficient implementation of Montgomery multiplier on FPGA using the redundant number system.

引用

页码：323 / 326

页数：4

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