High-Speed Frequency Domain Bit Synchronization Algorithm for Parallel Implementation

被引：0
|
作者：
Luan, Meisong [1 ]
Zhu, Hongquan [2 ]
Li, Ming [1 ]
机构：
[1] Beijing Inst Technol, Sch Informat & Elect, Beijing 100081, Peoples R China
[2] Beijing Inst Tracking & Telecommun Technol, Beijing 100094, Peoples R China
来源：
2018 10TH INTERNATIONAL CONFERENCE ON COMMUNICATION SOFTWARE AND NETWORKS (ICCSN) | 2018年
关键词：
bit synchronization; parallel structure; frequencydomain; high-speed communication;
D O I：
暂无
中图分类号：
TP31 [计算机软件];
学科分类号：
081202 ; 0835 ;
摘要：
A high-speed frequency-domain bit synchronization algorithm for parallel implementation is proposed in this paper, which is aimed at integrating high-speed laser communication with distance measurement. This algorithm which combines bit synchronization with the frequency-domain parallel matched filtering can make the output of filter only contain the data of optimum sampling points, so that the complexity of implementation will be obviously lower than parallel timedomain bit synchronization algorithm. Moreover, this algorithm adopts tracking timing adjustment to produce a better accuracy. A description of this algorithm is made in this paper, including formula derivation, implementation structure and simulation verification. Meanwhile, comparison between time-domain algorithm and frequency-domain algorithm is performed in this paper. According to the simulation results, this algorithm has a better performance.
引用
收藏
页码：479 / 483
页数：5
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