Automated Scan Chain Division for Reducing Shift and Capture Power During Broadside At-Speed Test

被引：11

作者：

Ko, Ho Fai ^{[1
]}

Nicolici, Nicola ^{[1
]}

机构：

[1] McMaster Univ, Dept Elect & Comp Engn, Hamilton, ON L8S 4K1, Canada

来源：

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS | 2008年 / 27卷 / 11期

关键词：

Broadside (BS); low-power at-speed test; partial scan;

D O I：

10.1109/TCAD.2008.2006091

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Scan chain division has been successfully used to control shift power by enabling mutually exclusive flip-flops at different times during the scan cycle. However, to control capture power without losing transition fault coverage during at-speed scan test, the existing automatic test pattern generation (ATPG) flows need to be modified. In this paper, we present a novel scan chain division algorithm that analyzes the signal dependencies and creates the circuit partitions such that both shift and capture power can be reduced when using the existing ATPG flows. This novel algorithm has been designed for the broadside test application strategy, and a technique for employing partial scan when dividing the scan chains is also proposed.

引用

页码：2092 / 2097

页数：6

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