A Fully Integrated High Efficiency 2.4 GHz CMOS Power Amplifier with Mode Switching Scheme for WLAN Applications

A 3.3 V mode-switching RF CMOS power amplifier (PA) for WLAN applications is presented, which is integrated into a 55-nm bulk CMOS process. The proposed PA offers both static control and dynamic power control, allowing it to operate efficiently in both low-power and high-power modes. The pure low-power mode is achieved by reducing power cells, which are also used for linearization in high power mode. The low-power mode is achieved by reducing the number of power cells which are also used for linearization in the high-power mode. In the dynamic power control mode, the total AM-AM and AM-PM distortion is effectively compensated for by dynamically controlling the number of power cells and adjusting the matching input. The proposed PA achieves an output P1dB of 27.6 dBm with a PAE of 32.7% and an output P1dB of 17.7 dBm with a PAE of 10% in high-power and low-power modes, respectively. It is measured with an 802.11 n 64-quadrature-amplitude-modulation (MCS7) signal and shows a maximum average power of 19 dBm under an error-vector-magnitude (EVM) of -27 dB.