Optimization of Ge Mole Fraction in Sacrificial Layers for Sub-3-nm Node Silicon Nanosheet FETs

被引:0
|
作者
Lee, Sanguk [1 ]
Jeong, Jinsu [1 ]
Yoon, Jun-Sik [1 ]
Lee, Seunghwan [1 ]
Lee, Junjong [1 ]
Lim, Jaewan [1 ]
Baek, Rock-Hyun [1 ]
机构
[1] Pohang Univ Sci & Technol POSTECH, Elect Engn, 77 Cheongam Ro, Pohang 37673, Gyeongbuk, South Korea
基金
新加坡国家研究基金会;
关键词
Nanosheet FETs; Inner Spacer; S/D recess depth; Germanium mole fraction;
D O I
10.1109/EDTM55494.2023.10103062
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Combinations of Ge mole fractions for performance optimization in NSFETs with S/D recess depth (TSD) variation were investigated using TCAD simulation. The inner spacer length (LIS) was set differently for each layer by controlling the Ge mole fraction of the SiGe sacrificial layer for performance optimization. In NSFETs with TSD variation, the performance was not optimized when all the LIS were set to 5 nm. The RC delay improved by 8.1% when the bottom LIS was shortened from 5 nm to 3 nm.
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页数:3
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