The impact of DC-bus impedance on the switching performance of low-voltage silicon power MOSFETs

Typical DC-bus stabilization for low-voltage power circuits consists primarily of ceramic capacitors due to the capacity density and low equivalent series resistance (ESR) resulting in low conduction losses. Particularly in hard-switching and hard-commutation operation, the low ESR and high equivalent series inductance (ESL) of the capacitors in the commutation path restrict the damping of the switch node voltage overshoot and introduce high-frequency ringing, reducing the voltage margin of the transistor. Therefore, this paper analyzes the impact of the DC-bus impedance and proposes a DC-bus snubber based on an RC network to form the DC-bus impedance's characteristic, which minimizes the overshoot voltage. A comprehensive simulation using measurement-derived component models is shown, which is verified by an in-situ measurement on a test PCB. Furthermore, transient measurements using a double pulse test setup show the effectiveness of the proposed approach.