FPGA based hardware platform for trapped-ion-based multi-level quantum systems

被引:2
|
作者
Zhu, Ming-Dong [1 ,2 ,3 ,4 ]
Yan, Lin [1 ,2 ,3 ,4 ]
Qin, Xi [1 ,2 ,3 ,4 ]
Zhang, Wen-Zhe [1 ,2 ,3 ,4 ]
Lin, Yiheng [1 ,2 ,3 ,4 ]
Du, Jiangfeng [1 ,2 ,3 ,4 ]
机构
[1] Univ Sci & Technol China, CAS Key Lab Microscale Magnet Resonance, Hefei 230026, Peoples R China
[2] Univ Sci & Technol China, Sch Phys Sci, Hefei 230026, Peoples R China
[3] Univ Sci & Technol China, CAS Ctr Excellence Quantum Informat & Quantum Phys, Hefei 230026, Peoples R China
[4] Univ Sci & Technol China, Hefei Natl Lab, Hefei 230088, Peoples R China
基金
中国国家自然科学基金; 国家重点研发计划;
关键词
FPGA; hardware platform; trapped-ion; multi-level quantum system; 07.50.-e;
D O I
10.1088/1674-1056/accb48
中图分类号
O4 [物理学];
学科分类号
0702 ;
摘要
We report a design and implementation of a field-programmable-gate-arrays (FPGA) based hardware platform, which is used to realize control and signal readout of trapped-ion-based multi-level quantum systems. This platform integrates a four-channel 2.8 Gsps@14 bits arbitrary waveform generator, a 16-channel 1 Gsps@14 bits direct-digital-synthesis-based radio-frequency generator, a 16-channel 8 ns resolution pulse generator, a 10-channel 16 bits digital-to-analog-converter module, and a 2-channel proportion integration differentiation controller. The hardware platform can be applied in the trapped-ion-based multi-level quantum systems, enabling quantum control of multi-level quantum system and high-dimensional quantum simulation. The platform is scalable and more channels for control and signal readout can be implemented by utilizing more parallel duplications of the hardware. The hardware platform also has a bright future to be applied in scaled trapped-ion-based quantum systems.
引用
收藏
页数:9
相关论文
共 50 条
  • [1] FPGA based hardware platform for trapped-ion-based multi-level quantum systems
    朱明东
    闫林
    秦熙
    张闻哲
    林毅恒
    杜江峰
    Chinese Physics B, 2023, 32 (09) : 57 - 65
  • [2] FPGA based hardware platform for trapped-ion-based multi-level quantum systems
    朱明东
    闫林
    秦熙
    张闻哲
    林毅恒
    杜江峰
    Chinese Physics B, 2023, (09) : 57 - 65
  • [3] Hardware requirements for trapped-ion-based verifiable blind quantum computing with a measurement-only client
    van Dam, J.
    Avis, G.
    Propp, Tz B.
    Ferreira da Silva, F.
    Slater, J. A.
    Northup, T. E.
    Wehner, S.
    QUANTUM SCIENCE AND TECHNOLOGY, 2024, 9 (04):
  • [4] An FPGA-Based Hardware Platform for the Control of Spin-Based Quantum Systems
    Qin, Xi
    Zhang, Wenzhe
    Wang, Lin
    Zhao, Yuxi
    Tong, Yu
    Rong, Xing
    Du, Jiangfeng
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2020, 69 (04) : 1127 - 1139
  • [5] Multi-level Photonics for Trapped-Ion Quantum Computing
    Kharas, Dave
    Sorace-Agaskar, Cheryl
    Bramhavar, Suraj
    Loh, William
    Sage, Jeremy M.
    Juodawlkis, Paul W.
    Chiaverini, John
    2017 IEEE PHOTONICS SOCIETY SUMMER TOPICAL MEETING SERIES (SUM), 2017, : 105 - 106
  • [6] Hybrid multi-level hardware Trojan detection platform for gate-level netlists based on XGBoost
    Zhang, Ying
    Li, Sen
    Chen, Xin
    Yao, Jiaqi
    Mao, Zhiming
    Yang, Jizhong
    Hua, Yifeng
    IET COMPUTERS AND DIGITAL TECHNIQUES, 2022, 16 (2-3): : 54 - 70
  • [7] A trapped-ion-based quantum byte with 10−5 next-neighbour cross-talk
    C. Piltz
    T. Sriarunothai
    A.F. Varón
    C. Wunderlich
    Nature Communications, 5
  • [8] REDUCING RECONFIGURATION TIMES OF FPGA-BASED SYSTEMS USING MULTI-LEVEL RECONFIGURATION
    Amaral, Alexandre M.
    Martins, Carlos A. P. S.
    Kastensmidt, Fernanda L. G.
    2009 5TH SOUTHERN CONFERENCE ON PROGRAMMABLE LOGIC, PROCEEDINGS, 2009, : 217 - +
  • [9] Multi-Level Mapping of Nanocomputer Architectures Based on Hardware Reuse
    Yakymets, Nataliya
    O'Connor, Ian
    Jabeur, Kotb
    Le Beux, Sebastien
    IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, 2015, 5 (01) : 88 - 97
  • [10] An FPGA-based hardware abstraction of quantum computing systems
    Madiha Khalid
    Umar Mujahid
    Atif Jafri
    Hongsik Choi
    Najam ul Islam Muhammad
    Journal of Computational Electronics, 2021, 20 : 2001 - 2018