Fault-Tolerant Methods for Three-Level Boost T-Type Inverter With Capacitor Voltage Reduction

Conventional quasi-switched boost (qSB) T-type inverter ((TI)-I-2) can tolerate open-circuit faults (OCFs) without requiring extra devices. However, capacitor voltage stresses of conventional fault-tolerant (FT) methods for qSB-(TI)-I-2 are very high. This article proposes a new topology named FT three-level boost (TLB) (TI)-I-2 to improve capacitor voltage rating under OCFs occurring at inner switches of TLB circuit (F1) and inverter half-bridge switches (F2). One normally-closed relay is added to TLB-(TI)-I-2. In faulty conditions, this relay is opened. The boost switches act as a backup-leg for inverter side switches, and vice versa. In postfault conditions, the inverter operates like a two-level inverter. Discontinuous pulsewidth modulation techniques are employed to control the introduced FT-TLB-(TI)-I-2. Under proposed methods, the capacitor voltage ratings of the inverter are reduced by at least 50% compared to previous FT methods. Moreover, the voltage ratings of semiconductor devices are significantly decreased compared to existing methods. The proposed inverter can solve multiple OCFs occurring at the same time, which was limited in previous works. A 1-kVA experimental prototype is built to verify the proposed methods. The experimental prototype can obtain 95% peak-efficiency in normal operating, 93.58% and 92.76% under F1 and F2, respectively.