Efficient FPGA-Based Convolutional Neural Network Implementation for Edge Computing

被引:1
|
作者
Cuong, Pham-Quoc [1 ,2 ]
Thinh, Tran Ngoc [1 ,2 ]
机构
[1] Ho Chi Minh City Univ Technol HCMUT, Dept Comp Engn, Ho Chi Minh City, Vietnam
[2] Vietnam Natl Univ Ho Chi Minh City VNU HCM, Dept Comp Engn, Ho Chi Minh City, Vietnam
关键词
Field Programmable Gate Array (FPGA); convolutional neural network; hardware accelerator; MobileNet; DESIGN; CNN;
D O I
10.12720/jait.14.3.479-487
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In recent years, accelerating convolutional neural networks on Field Programmable Gate Array (FPGA) to improve the performance of the inference phase of artificial intelligent edge computing applications is a promising approach. This paper presents our proposed architecture for building a convolution neural network acceleration core on FPGA. The proposed FPGA-based core targets edge computing platforms where hardware resources and power efficiency are essential requirements. We use the MobileNet neural network model for image classification as a case study to evaluate our proposed system. We compare our work with a quad-core ARM Cortex processor at 1.2GHz and achieve speed-ups by up to 14.77x convolution operators. Although our system is worse than a 6-core Intel Core i7 processor, it is more energy-efficiency than the Intel processor. Our proposed system is the best fit for edge computing.
引用
收藏
页码:479 / 487
页数:9
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