The Effects of Process Variations and BTI in Packaged FinFET Devices

被引:0
|
作者
Bender, E. [1 ,2 ]
Bernstein, J. B. [1 ]
Boning, D. S. [2 ]
机构
[1] Ariel Univ, Dept Elect & Elect Engn, IL-40700 Ariel, Israel
[2] MIT, Microsyst Technol Labs MTL Dept, Cambridge, MA 02142 USA
关键词
FPGA; RO; SHE; FinFET; BTI; Process Variations; CIRCUIT RELIABILITY;
D O I
10.1109/IRPS48203.2023.10117980
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
A correlation between device reliability and process variations in packaged devices is identified. Weibull distribution statistics are used in a novel method for finding the limit of precision possible for time-to-failure averaging. This study identifies increase of variance due to process variation with size scaling in three generations of technologies. There is a linear decrease in precision threshold which correlates to the size of the device. The results present a concern of BTI in technologies from 16nm and below.
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收藏
页数:5
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