Multi-Tag: A Hardware-Software Co-Design for Memory Safety based on Multi-Granular Memory Tagging

被引:2
|
作者
Unterguggenberger, Martin [1 ]
Schrammel, David [1 ]
Nasahl, Pascal [1 ]
Schilling, Robert [1 ]
Lamster, Lukas [1 ]
Mangard, Stefan [1 ]
机构
[1] Graz Univ Technol, Graz, Austria
关键词
Memory Safety; Tagged Memory Architecture; Multi-Granular Tags; ARCHITECTURAL SUPPORT;
D O I
10.1145/3579856.3590331
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Memory safety vulnerabilities are a severe threat to modern computer systems allowing adversaries to leak or modify securitycritical data. To protect systems from this attack vector, full memory safety is required. As software-based countermeasures tend to induce significant runtime overheads, which is not acceptable for production code, hardware assistance is needed. Tagged memory architectures, e.g., already offered by the ARM MTE and SPARC ADI extensions, assign meta-information to memory objects, thus allowing to implement memory safety policies. However, due to the high tag collision probability caused by the small tag sizes, the protection guarantees of these schemes are limited. This paper presents Multi-Tag, the first hardware-software co-design utilizing a multi-granular tagging structure that provides strong protection against spatial and temporal memory safety violations. By combining object-granular memory tags with pagegranular tags stored in the page table entries, Multi-Tag overcomes the limitation of small tag sizes. Introducing page-granular tags significantly enhances the probabilistic protection capabilities of memory tagging without increasing the memory overhead or the system's complexity. We develop a prototype implementation comprising a gem5 model of the tagged architecture, a Linux kernel extension, and an LLVM-based compiler toolchain. The simulated performance overhead for the SPEC CPU2017 and nbench-byte benchmarks highlights the practicability of our design.
引用
收藏
页码:177 / 189
页数:13
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