Experimental Demonstration of an Integrated Bidirectional Gate ESD Protection Structure for p-GaN Power HEMTs

This letter experimentally demonstrates an integrated bidirectional protection structure to improve the p-GaN power HEMTs' gate ESD reliability. The protection structure comprises an event-triggeringp-GaN HEMT, a lowside resistor RL, and a high-side resistor R-H. The critical parameters such as transmission line pulsing (TLP) failure current, trigger voltage VTrig and leakage current I-leak are evaluated by TLP testing. It is validated that this protection structure can sustain a forward TLP failure current up to 1.42 A (equivalent human body model passing voltage V-HBM approximate to 2.13 kV) and a reverse TLP failure current up to 3.06 A (V-HBM approximate to 4.59 kV) without sacrificing the protected device's performance. In addition, it is verified that the TLP failure current can be adjusted by the event-triggering p-GaN HEMT's active area and R-H/R-L ratio.