FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance SmartNICs

被引:0
|
作者
Zyla, Klajd [1 ]
Liess, Marco [1 ]
Wild, Thomas [1 ]
Herkersdorf, Andreas [1 ]
机构
[1] Tech Univ Munich, Chair Integrated Syst, Munich, Germany
关键词
SmartNICs; Packet processing; Load balancing; SDN; 6G;
D O I
10.1109/VLSI-SoC57769.2023.10321933
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Data centers have been struggling to provide the necessary processing capacity to handle the surging rate of network traffic that is generated in an increasingly connected and service-oriented world. As a result, SmartNICs play an even more important role than before as they can offload various network applications and hence free CPU resources for application-layer processing, increase performance and reduce processing time. However, they often do not support flows with different offload requirements and cannot dynamically allocate offloads in runtime. In order to address these limitations, we propose FlexPipe, a fast, flexible and scalable packet-processing architecture for high-performance SmartNICs. Our design enables low-latency and runtime-reconfigurable packet forwarding at high traffic rates with minimal area overhead. Furthermore, it provides load-aware packet steering toward multiple offload units of the same type for low-bandwidth offloads. We implement a prototype of FlexPipe in Verilog and validate it via cycle-accurate register-transfer level simulations. Our evaluation results show that FlexPipe can process packets of arbitrary size with different offload requirements at line rate and on average 1.9x faster than a SmartNIC with a predefined sequence of offloads and 1.8x faster than PANIC, a flexible state-of-the-art SmartNIC.
引用
收藏
页码:299 / 304
页数:6
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