VLSI Architecture for Image Scaling in Multimedia Applications

被引：0
|
作者：
Vivek, C. [1 ]
Gayathri, P. [1 ]
Ranjitha, B. [1 ]
Vibuharshini, M. [1 ]
机构：
[1] M Kumarasamy Coll Engn, Dept Elect & Commun Engn, Karur 639113, Tamil Nadu, India
来源：
SOFT COMPUTING FOR SECURITY APPLICATIONS, ICSCS 2022 | 2023年 / 1428卷
关键词：
Digital image processing; Median buffer; Prefilter; De-emphasizing; Picture analysis;
D O I：
10.1007/978-981-19-3590-9_33
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
Image scaling is a resizing technique that is frequently used in digital image processing. It is a technique that is used in a variety of fields. The proposed algorithms are implemented in MATLAB for image sampling and ModelSim for hardware architecture processing. The image quality is assessed using the peak signal over noise ratio (PSNR) and structural similarity (SSIM) metrics. The proposed nonlinear picture scaling architecture is straightforward to build and memory-friendly.
引用
收藏
页码：423 / 433
页数：11
相关论文
共 50 条
  • [1] AREA EFFICIENT LAGRANGE IMAGE UP-SCALING ARCHITECTURE FOR MULTIMEDIA APPLICATIONS
    Moses, John C.
    Selvathi, D.
    Queen, Sahaya Edal G.
    PROCEEDINGS OF 2017 IEEE INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING AND COMMUNICATION (ICSPC'17), 2017, : 201 - 205
  • [2] VLSI Reed Solomon decoder architecture for networked multimedia applications
    Martina, M
    Masera, G
    Piccinini, G
    Vacca, F
    Zamboni, M
    14TH ANNUAL IEEE INTERNATIONAL ASIC/SOC CONFERENCE, PROCEEDINGS, 2001, : 347 - 351
  • [3] IP reuse VLSI architecture for low complexity fast motion estimation in multimedia applications
    Fanucci, L
    Saponara, S
    Cenciotti, A
    PROCEEDINGS OF THE 26TH EUROMICRO CONFERENCE, VOLS I AND II, 2000, : 417 - 424
  • [4] VLSI Design 97 and multimedia applications
    Seth, S
    IEEE DESIGN & TEST OF COMPUTERS, 1997, 14 (03): : 9 - 10
  • [5] VLSI ARCHITECTURE FOR IMAGE TRANSFORMATION
    CHENG, HD
    TANG, YY
    SUEN, CY
    GAO, QS
    VLSI AND COMPUTER PERIPHERALS: VLSI AND MICROELECTRONIC APPLICATIONS IN INTELLIGENT PERIPHERALS AND THEIR INTERCONNECTION NETWORKS, 1989, : B124 - B126
  • [6] A VLSI architecture for image reconstruction
    Martins, CAPS
    Kofuji, ST
    Zuffo, JA
    Moreno, ED
    1997 CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING, CONFERENCE PROCEEDINGS, VOLS I AND II: ENGINEERING INNOVATION: VOYAGE OF DISCOVERY, 1997, : 540 - 543
  • [7] VLSI Implementation of Image Scaling Processor
    Priya, Gowthami P.
    Vairavel, G.
    2014 INTERNATIONAL CONFERENCE ON ELECTRONICS AND COMMUNICATION SYSTEMS (ICECS), 2014,
  • [8] A Low-Cost Energy Efficient Image Scaling Processor for Multimedia Applications
    Garg, Bharat
    Goteti, V. N. S. K. Chaitanya
    Sharma, G. K.
    2016 20TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST (VDAT), 2016,
  • [9] Special issue on VLSI architectures for multimedia applications
    Badawy, W
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2004, 13 (06) : III - IV
  • [10] Reconfigurable SRAM Architecture With Spatial Voltage Scaling for Low Power Mobile Multimedia Applications
    Cho, Minki
    Schlessman, Jason
    Wolf, Wayne
    Mukhopadhyay, Saibal
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2011, 19 (01) : 161 - 165
12345