Impact of self-heating on thermal noise in In1_xGaxAs GAA MOSFETs

Self-heating in nanoscale gate-all-around (GAA) MOSFETs can be attributed to the low thermal conductivity of channel material, gate dielectric material, and large thermal resistance of the source and drain contacts. Self-heating can severely increase the thermal noise level in nanoscale gate-all-around (GAA) MOSFETs as the peak lattice temperature increases several degrees above the ambient temperature. This work presents a detailed analysis of thermal noise in InGaAs based nanowire (NW)/nanosheet (NS) GAA metal-oxide-semiconductor field-effect transistors (MOSFETs). Calibrated electro-thermal simulation results are used to analyze the influence of interfacial thermal resistance (ITR), the number of nanowires/nanosheets (N) and mole fraction of Gallium on drain noise power spectral density (SID), induced gate noise power spectral density (SIG), and cross-correlation noise power spectral density (SIC). The impact of engineered source/drain contacts and thermal conductivity of buried oxide (BOX) materials on SID, SIG, and SIC parameters is also investigated in this work. It is observed that Si3N4 outperforms SiO2 as a BOX material. The noise power spectral densities such as SID, SIG, and SIC decrease by 8%, 27%, and 22%, respectively, in NW GAA MOSFETs and 16%, 26%, and 18%, respectively, in NS GAA MOSFETs, when Si3N4 replaces SiO2 as a BOX layer.