An Associativity Threshold Phenomenon in Set-Associative Caches

被引:0
|
作者
Bender, Michael A. [1 ]
Das, Rathish [2 ]
Farach-Colton, Martin [3 ]
Tagliavini, Guido [3 ]
机构
[1] SUNY Stony Brook, Stony Brook, NY 11794 USA
[2] Univ Houston, Houston, TX USA
[3] Rutgers State Univ, New Brunswick, NJ USA
基金
加拿大自然科学与工程研究理事会;
关键词
Set-associative cache; paging; LRU; PERFORMANCE; ALGORITHMS;
D O I
10.1145/3558481.3591084
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
In an alpha-way set-associative cache, the cache is partitioned into disjoint sets of size alpha, and each item can only be cached in one set, typically selected via a hash function. Set-associative caches are widely used and have many benefits, e.g., in terms of latency or concurrency, over fully associative caches, but they often incur more cache misses. As the set size alpha decreases, the benefits increase, but the paging costs worsen. In this paper we characterize the performance of an alpha-way set-associative LRU cache of total size k, as a function of alpha = alpha(k). We prove the following, assuming that sets are selected using a fully random hash function: For alpha = omega(log k), the paging cost of an alpha-way set-associative LRU cache is within additive O(1) of that a fully-associative LRU cache of size (1- o(1))k, with probability 1 - 1/poly(k), for all request sequences of length poly(k). For alpha = o(log k), and for all c = O(1) and r = O(1), the paging cost of an alpha-way set-associative LRU cache is not within a factor c of that a fully-associative LRU cache of size k/r, for some request sequence of length O(k(1.01)). For alpha = omega(log k), if the hash function can be occasionally changed, the paging cost of an alpha-way set-associative LRU cache is within a factor 1 + o(1) of that a fully-associative LRU cache of size (1- o(1))k, with probability 1 - 1/poly(k), for request sequences of arbitrary (e.g., super-polynomial) length. Some of our results generalize to other paging algorithms besides LRU, such as least-frequently used (LFU).
引用
收藏
页码:117 / 127
页数:11
相关论文
共 50 条
  • [1] Timing analysis for data caches and set-associative caches
    White, RT
    Mueller, F
    Healy, CA
    Whalley, DB
    Harmon, MG
    [J]. THIRD IEEE REAL-TIME TECHNOLOGY AND APPLICATIONS SYMPOSIUM, PROCEEDINGS, 1997, : 192 - 202
  • [2] Generalizing timing predictions to set-associative caches
    Mueller, F
    [J]. NINTH EUROMICRO WORKSHOP ON REAL TIME SYSTEMS, PROCEEDINGS, 1997, : 64 - 71
  • [3] Way-tracking set-associative caches
    Kang, J.
    Lee, S.
    Lee, I.
    [J]. ELECTRONICS LETTERS, 2010, 46 (22) : 1497 - 1498
  • [4] STACK EVALUATION OF ARBITRARY SET-ASSOCIATIVE MULTIPROCESSOR CACHES
    WU, YG
    MUNTZ, R
    [J]. IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 1995, 6 (09) : 930 - 942
  • [5] Applying decay to reduce dynamic power in set-associative caches
    Keramidas, Georgios
    Xekalakis, Polychronis
    Kaxiras, Stefanos
    [J]. HIGH PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS, PROCEEDINGS, 2007, 4367 : 38 - +
  • [6] Recruiting Decay for Dynamic Power Reduction in Set-Associative Caches
    Keramidas, Georgios
    Xekalakis, Polychronis
    Kaxiras, Stefanos
    [J]. TRANSACTIONS ON HIGH-PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS II, 2009, 5470 : 4 - 22
  • [7] Resilience Analysis: Tightening the CRPD bound for set-associative caches
    Altmeyer, Sebastian
    Maiza , Claire
    Reineke, Jan
    [J]. ACM SIGPLAN NOTICES, 2010, 45 (04) : 153 - 162
  • [8] Using a way cache to improve performance of set-associative caches
    Nicolaescu, Dan
    Veidenbaum, Alexander
    Nicolau, Alexandru
    [J]. HIGH-PERFORMANCE COMPUTING, 2008, 4759 : 93 - +
  • [9] Resilience Analysis: Tightening the CRPD bound for set-associative caches
    Altmeyer, Sebastian
    Maiza , Claire
    Reineke, Jan
    [J]. LCTES 10-PROCEEDINGS OF THE ACM SIGPLAN/SIGBED 2010 CONFERENCE ON LANGUAGES, COMPILERS, & TOOLS FOR EMBEDDED SYSTEMS, 2010, : 153 - 162
  • [10] Tolerating Process Variations in Large, Set-Associative Caches: The Buddy Cache
    Koh, Cheng-Kok
    Wong, Weng-Fai
    Chen, Yiran
    Li, Hai
    [J]. ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2009, 6 (02)