3D integration of pixel readout chips using Through-Silicon-Vias

被引：0

作者：

Diaz, Francisco Piernas ^{[1
]}

Alozy, Jerome ^{[1
]}

Al-Tawil, Sara ^{[1
]}

Buytaert, Jan ^{[1
]}

Campbell, Michael ^{[1
]}

Fritzsch, Thomas ^{[2
]}

Kloukinas, Kostas ^{[1
]}

Kovacs, Mark Istvan ^{[1
]}

Cudie, Xavier Llopart ^{[1
]}

Pinto, Mateus Vicente Barreto ^{[3
]}

Wyllie, Ken ^{[1
]}

机构：

[1] European Org Nucl Res CERN, Geneva, Switzerland

[2] IZM Fraunhofer, Berlin, Germany

[3] Univ Geneva, Geneva, Switzerland

来源：

JOURNAL OF INSTRUMENTATION | 2025年 / 20卷 / 01期

关键词：

Electronic detector readout concepts (solid-state); Hybrid detectors; Particle tracking detectors; Pixelated detectors and associated VLSI electronics;

D O I：

10.1088/1748-0221/20/01/C01017

中图分类号：

TH7 [仪器、仪表];

学科分类号：

0804 ; 080401 ; 081102 ;

摘要：

Particle tracking and imaging detectors are becoming increasingly complex, driven by demands for densely integrated functionality and maximal sensitive area. These challenging requirements can be met using 3D interconnect techniques widely used in industry. In this paper, we present the results of an evaluation of the 3D Through-Silicon-Via (TSV) technology, using the Timepix4 integrated circuit as a test-vehicle. We will present the concepts for 3D integration and test results from TSV-processed chips bonded to custom-designed circuit boards conceived as proofs-of-principle for future detector modules.

引用

页数：8

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