Improving System-level performance and robustness in power line monitoring

被引：0
|
作者：
Gil, Lluis Beltran [1 ]
机构：
[1] Analog Devices, United States
来源：
Electronics World | 2024年 / 129卷 / 2041期
关键词：
Power systems computer aided design - System-on-chip;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：22 / 24
相关论文
共 50 条
  • [21] System-level power: choosing the right level of integration
    Goldberg, Larry
    Electronic Products (Garden City, New York), 1995, 37 (10): : 53 - 54
  • [22] System-level performance analysis in SystemC
    Posadas, H
    Herrera, F
    Sánchez, P
    Villar, E
    Blasco, F
    DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, 2004, : 378 - 383
  • [23] System-level Performance of Interference Alignment
    Mungara, Ratheesh K.
    Morales-Jimenez, David
    Lozano, Angel
    2014 IEEE GLOBAL COMMUNICATIONS CONFERENCE (GLOBECOM 2014), 2014, : 1673 - 1678
  • [24] System-Level Performance of Interference Alignment
    Mungara, Ratheesh K.
    Morales-Jimenez, David
    Lozano, Angel
    IEEE TRANSACTIONS ON WIRELESS COMMUNICATIONS, 2015, 14 (02) : 1060 - 1070
  • [25] System-level Max Power (SYMPO) - A Systematic Approach for Escalating System-level Power Consumption using Synthetic Benchmarks
    Ganesan, Karthik
    Jo, Jungho
    Bircher, W. Lloyd
    Kaseridis, Dimitris
    Yu, Zhibin
    John, Lizy K.
    PACT 2010: PROCEEDINGS OF THE NINETEENTH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, 2010, : 19 - 28
  • [26] System-level transient thermal analysis for performance optimization of high power microelectronics
    Chiriac, VA
    Lee, TYT
    Chen, HS
    ADVANCES IN ELECTRONIC PACKAGING 2003, VOL 2, 2003, : 435 - 442
  • [27] System-Level Power-Performance Efficiency Modeling for Emergent GPU Architectures
    Song, Shuaiwen
    Cameron, Kirk W.
    PROCEEDINGS OF THE 21ST INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES (PACT'12), 2012, : 473 - 473
  • [28] Performance improvement of a system-level harmonic using a harmonic power flow controller
    Mehri R.
    Mokhtari H.
    Zolghadri M.R.
    Scientia Iranica, 2024, 31 (02) : 161 - 173
  • [29] Predicting System-level Power for a Hybrid Supercomputer
    Sirbu, Alina
    Bahaoglu, Ozalp
    2016 INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING & SIMULATION (HPCS 2016), 2016, : 826 - 833
  • [30] Comparing system-level power management policies
    Lu, YH
    De Micheli, G
    IEEE DESIGN & TEST OF COMPUTERS, 2001, 18 (02): : 10 - 19
12345