共 50 条
- [41] A High Throughput and Flexible Rate 5G NR LDPC Encoder on a Single GPU 2022 24TH INTERNATIONAL CONFERENCE ON ADVANCED COMMUNICATION TECHNOLOGY (ICACT): ARITIFLCIAL INTELLIGENCE TECHNOLOGIES TOWARD CYBERSECURITY, 2022, : 29 - +
- [42] A High-efficiency HEVC Entropy Decoding Hardware Architecture 2015 17TH INTERNATIONAL CONFERENCE ON ADVANCED COMMUNICATION TECHNOLOGY (ICACT), 2015, : 186 - 190
- [43] Quarc: a High-Efficiency Network on-Chip Architecture 2009 INTERNATIONAL CONFERENCE ON ADVANCED INFORMATION NETWORKING AND APPLICATIONS, 2009, : 98 - +
- [44] High throughput encoder architecture for DVB-S2 LDPC-IRA codes 2007 INTERNATIONAL CONFERENCE ON MICROELECTRONICS, 2007, : 85 - +
- [45] FPGA Implementation of LDPC Encoder Architecture for Wireless Communication Standards 2020 9TH INTERNATIONAL CONFERENCE ON MODERN CIRCUITS AND SYSTEMS TECHNOLOGIES (MOCAST), 2020,
- [46] An Efficient GC-LDPC Encoder Architecture for High-Speed NAND Flash Applications IEICE ELECTRONICS EXPRESS, 2024, 21 (02):
- [48] High-Gain and High-Efficiency Flexible Nonsymmetrical Metamaterial Tag IEEE ANTENNAS AND WIRELESS PROPAGATION LETTERS, 2023, 22 (08): : 1927 - 1931
- [49] A Flexible High Throughput Multi-ASIP Architecture for LDPC and Turbo Decoding 2011 DESIGN, AUTOMATION & TEST IN EUROPE (DATE), 2011, : 228 - 233
- [50] VLSI Architecture of High Speed SAD for High Efficiency Video Coding (HEVC) Encoder 2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2018,