HARDWARE VERIFICATION AT FUNCTIONAL DESIGN STAGE.

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Maruyama, Fumhiro
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The paper considers the reliability in logic design. A new method of verification is described that detects the inconsistencies in the hardware functional descriptions and verifies that the hardware meets the given specifications. This method is aimed basically at verifying the logic design of large-scale computers and provides an effective verification algorithm for checking the interfaces between units, in which problems of erroneous design are more frequent.
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页码:152 / 161
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