共 50 条
- [31] A Low-Noise Fast-Settling Phase Locked Loop with Loop Bandwidth Enhancement 2008 JOINT IEEE NORTH-EAST WORKSHOP ON CIRCUITS AND SYSTEMS AND TAISA CONFERENCE, 2008, : 165 - +
- [32] Noise Analysis of A BJT-Based Charge Pump for Low-Noise PLL Applications 2017 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN (ECCTD), 2017,
- [33] Design of low jitter adaptive-bandwidth charge pump PLL with passive filter ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 319 - 322
- [34] A low-noise 1.6-GHz CMOS PLL with on-chip loop filter PROCEEDINGS OF THE IEEE 1997 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1997, : 407 - 410
- [36] Design of low jitter PLL for clock generator with supply noise insensitive VCO ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6, 1998, : 233 - 236
- [37] A novel low jitter PLL clock generator with supply noise insensitive design 2001 4TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS, 2001, : 259 - 261
- [40] High Bandwidth Phase-Locking for Low-Noise Applications 2020 CONFERENCE ON LASERS AND ELECTRO-OPTICS PACIFIC RIM (CLEO-PR), 2020,