Adaptive controller system based on genetic algorithm processor

The possibility of constructing a digital logic device has been investigated, which directly executes a family of search and optimization procedures known as genetic algorithms. These algorithms are significant to engineering applications as a means of providing additional adaptive capability to known and existing control mechanisms. This paper discusses the mechanism of genetic algorithms and a model of a computing architecture which implements these features. The model has been developed and simulated using the hardware descriptive language VHDL. The model has been tested under the DeJong test suite. A new configuration of the system based on multiple genetic algorithm processors has been applied to a typical dynamic PID Controller. Test results show that, the Genetic Algorithm Processor is capable of optimizing static and dynamic problems with high reliability.