共 50 条
- [42] Parallel 2D FFT implementation on FPGA suitable for real-time MR image processing REVIEW OF SCIENTIFIC INSTRUMENTS, 2018, 89 (09):
- [43] FPGA-Based Parallel Implementation of Morphological Operators for 2D Gray-Level Images Arabian Journal for Science and Engineering, 2017, 42 : 3191 - 3206
- [44] An efficient implementation of a 2D DWT on FPGA 2007 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS, PROCEEDINGS, VOLS 1 AND 2, 2007, : 222 - 227
- [45] An efficient implementation of 2D convolution in CNN IEICE ELECTRONICS EXPRESS, 2017, 14 (01): : 1 - 8
- [46] Designing and implementation of 2D character barcode 2012 2ND INTERNATIONAL CONFERENCE ON APPLIED ROBOTICS FOR THE POWER INDUSTRY (CARPI), 2012, : 566 - 568
- [47] An Implementation of a High Capacity 2D Barcode ADVANCES IN INFORMATION TECHNOLOGY, 2012, 344 : 159 - 169
- [48] An implementation of 2D IDCT using AltiVec 2002 6TH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING PROCEEDINGS, VOLS I AND II, 2002, : 17 - 20
- [50] Designing and implementation of 2D character barcode 1600, Trans Tech Publications Ltd, Kreuzstrasse 10, Zurich-Durnten, CH-8635, Switzerland (710):