Built-in test module for fault isolation

被引：0
|
作者：
机构：
[1] Vasanthavada, Nagesh
[2] Kanopoulos, Nick
来源：
Vasanthavada, Nagesh | 1600年 / 06期
关键词：
Built-in Testing - Faulty Chips Isolation - Go/No-Go Testing - Signature Analysis - Testing Switch Architecture;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
相关论文
共 50 条
  • [31] Applying built-in self-test to majority voting fault tolerant circuits
    Stroud, CE
    Tannehill, JK
    16TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 1998, : 303 - 308
  • [32] Built-in via module test structure for backend interconnection in-line process monitor
    Li, HY
    Li, WH
    Wong, LY
    Hwang, N
    IPFA 2005: Proceedings of the 12th International Symposium on the Physical & Failure Analysis of Integrated Circuits, 2005, : 167 - 170
  • [33] Built-in Self-Test Design for Fault Detection and Fault Diagnosis in SRAM-Based FPGA
    Hsu, Chun-Lung
    Chen, Ting-Hsuan
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2009, 58 (07) : 2300 - 2315
  • [34] Combining scan test and built-in self test
    Seuring, Markus
    JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2006, 22 (03): : 297 - 299
  • [35] Combining Scan Test and Built-in Self Test
    Markus Seuring
    Journal of Electronic Testing, 2006, 22 : 297 - 299
  • [36] Built-in self-test quality assessment using hardware fault emulation in FPGAs
    Parreira, A
    Teixeira, JP
    Santos, MB
    COMPUTING AND INFORMATICS, 2004, 23 (5-6) : 537 - 556
  • [37] Fault-based Built-in Self-test and Evaluation of Phase Locked Loops
    Ince, Mehmet
    Yilmaz, Ender
    Fu, Wei
    Park, Joonsung
    Nagaraj, Krishnaswamy
    Winemberg, Leroy
    Ozev, Sule
    ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2021, 26 (03)
  • [38] Digital Built-in Self-Test for Phased Locked Loops to Enable Fault Detection
    Ince, Mehmet
    Yilmaz, Ender
    Fu, Wei
    Park, Joonsung
    Nagaraj, Krishnaswamy
    Winemberg, LeRoy
    Ozev, Sule
    2019 IEEE EUROPEAN TEST SYMPOSIUM (ETS), 2019,
  • [39] Unified Fault Management Using Logic Built-In Self-Test and Logic Bitmap
    Kay, Douglas
    Tran, Lien
    Kamm, Matthias
    Orbon, Jacob
    2009 IEEE/SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE, 2009, : 189 - +
  • [40] BUILT-IN SELF-TEST (BIST) STRUCTURE FOR ANALOG CIRCUIT FAULT-DIAGNOSIS
    WEY, CL
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 1990, 39 (03) : 517 - 521
12345