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- [21] Design of a super-pipelined Viterbi decoder ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1: VLSI, 1999, : 133 - 136
- [22] High Performance Reconfigurable Viterbi Decoder Design for Multi-Standard Receiver 2016 33RD NATIONAL RADIO SCIENCE CONFERENCE (NRSC), 2016, : 249 - 256
- [23] Design and Implementation of High Performance Viterbi Decoder for Mobile Communication Data Security COMPUTATIONAL INTELLIGENCE IN SECURITY FOR INFORMATION SYSTEMS, 2009, 63 : 69 - 76
- [24] Design and implementation of a Viterbi decoder using FPGAs TWELFTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 1999, : 611 - 614
- [25] Design and Implementation of Viterbi Decoder Using VHDL 3RD INTERNATIONAL CONFERENCE ON COMMUNICATION SYSTEMS (ICCS-2017), 2018, 331
- [26] An efficient Viterbi decoder design for DMB receiver ISPACS 2005: PROCEEDINGS OF THE 2005 INTERNATIONAL SYMPOSIUM ON INTELLIGENT SIGNAL PROCESSING AND COMMUNICATION SYSTEMS, 2005, : 569 - 572
- [27] Design of a super-pipelined Viterbi decoder Proceedings - IEEE International Symposium on Circuits and Systems, 1999, 1
- [28] High performance Viterbi decoder for OFDM systems VTC2004-SPRING: 2004 IEEE 59TH VEHICULAR TECHNOLOGY CONFERENCE, VOLS 1-5, PROCEEDINGS, 2004, : 323 - 327
- [29] Prototyping of a high performance generic Viterbi decoder 13TH IEEE INTERNATIONAL WORKSHOP ON RAPID SYSTEM PROTOTYPING, PROCEEDINGS, 2002, : 42 - 47
- [30] A convolutional code decoder design using Viterbi algorithm with register exchange history unit SIBCON-2005: IEEE International Siberian Conference on Control and Communications, 2005, : 10 - 15