Verification has always been an integral part of the FPGA design flow. In fact, engineers consider design verification as the most critical task in successfully creating complex designs and decreasing time to market. At present, various verification strategies, from which engineers can choose from are already available.
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Indian Inst Technol, Dept Comp Sci & Engn, Madras 600036, Tamil Nadu, IndiaIndian Inst Technol, Dept Comp Sci & Engn, Madras 600036, Tamil Nadu, India
Kumar, LK
Ramani, AS
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Indian Inst Technol, Dept Comp Sci & Engn, Madras 600036, Tamil Nadu, IndiaIndian Inst Technol, Dept Comp Sci & Engn, Madras 600036, Tamil Nadu, India
Ramani, AS
Mupid, AJ
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Indian Inst Technol, Dept Comp Sci & Engn, Madras 600036, Tamil Nadu, IndiaIndian Inst Technol, Dept Comp Sci & Engn, Madras 600036, Tamil Nadu, India
Mupid, AJ
Kamakoti, V
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Indian Inst Technol, Dept Comp Sci & Engn, Madras 600036, Tamil Nadu, IndiaIndian Inst Technol, Dept Comp Sci & Engn, Madras 600036, Tamil Nadu, India