共 41 条
- [12] A single-electron shut-off transistor for a scalable sub-0.1-μm memory INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, : 301 - 304
- [14] Physical limitations and design for sub-0.1-μm MOS devices:: Carrier velocity overshoot and performance fluctuation ELECTRONICS AND COMMUNICATIONS IN JAPAN PART II-ELECTRONICS, 1998, 81 (08): : 18 - 25
- [15] Deep sub-0.1-μm MOSFETs with very thin SOI layer for ultralow-power applications ELECTRONICS AND COMMUNICATIONS IN JAPAN PART II-ELECTRONICS, 1998, 81 (11): : 18 - 25
- [19] Impact of energy contamination of ultra-low energy implants on sub-0.1-μm CMOS device performance IIT2002: ION IMPLANTATION TECHNOLOGY, PROCEEDINGS, 2003, : 40 - 43
- [20] Sub-0.1-μm-pattern fabrication using a 193-nm top surface imaging (TSI) process JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1998, 37 (12B): : 6734 - 6738