共 50 条
- [31] Power-delay tradeoffs for radix-4 and radix-8 dividers 1998 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN - PROCEEDINGS, 1998, : 109 - 111
- [32] An efficient implementation of rotational radix-4 CORDIC based FFT processor 2013 IEEE RECENT ADVANCES IN INTELLIGENT COMPUTATIONAL SYSTEMS (RAICS), 2013, : 37 - 42
- [33] A hybrid radix-4/radix-8 low power signed multiplier architecture IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1997, 44 (08): : 656 - 659
- [35] FPGA Implementation of High Speed FFT algorithm Based on split-radix 2008 INTERNATIONAL SYMPOSIUM ON INTELLIGENT INFORMATION TECHNOLOGY APPLICATION WORKSHOP: IITA 2008 WORKSHOPS, PROCEEDINGS, 2008, : 781 - 784
- [36] A VLSI DELAY COMMUTATOR FOR FFT IMPLEMENTATION IEEE INTERNATIONAL SOLID STATE CIRCUITS CONFERENCE, 1984, 27 : 266 - +
- [37] RADIX-8 DIVISION WITH OVER-REDUNDANT DIGIT SET JOURNAL OF VLSI SIGNAL PROCESSING, 1994, 7 (03): : 259 - 270
- [40] ON HARDWARE IMPLEMENTATION OF THE SPLIT-RADIX FFT IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1988, 36 (10): : 1575 - 1581