TEST GENERATION SYSTEM FOR DIGITAL CIRCUITS.

This paper introduces the global aspect of a test generation system and details of two major programs, the automatic test generator and the parallel fault simulator, which play an important part in the system. The test generation system was developed for testing of a large number of printed circuit boards. The automatic test generator employs a conventional path-sensitizing algorithm as basic test generation strategy. The parallel fault simulator based on table driven and selective trace methods can concurrently simulate a number of single faults assumed in a circuit. Both programs can treat not only conventional gates and flip-flops but also various functional elements as primitive elements, and can accommodate both synchronous and asynchronous circuits.