Properties of the p+ poly-Si gate fabricated using the As preamorphization method

被引:0
|
作者
Kim, Yeo Hwan [1 ]
Kwon, Sang Jik [1 ]
Chun, Kuk Jin [1 ]
Lee, Jong Duk [1 ]
机构
[1] Seoul Natl Univ, Seoul, Korea, Republic of
关键词
Amorphous films - Annealing - Arsenic - Boron - Composition effects - Diffusion in solids - Electric conductivity of solids - Gates (transistor) - Grain growth - Grain size and shape - Ion implantation - MOSFET devices;
D O I
暂无
中图分类号
学科分类号
摘要
In a deep submicon p-channel metal oxide field effect transistor (PMOSFET), the importance of the p+ poly-Si gate with less boron penetration and higher conductivity increases. With As implantation prior to B+ implantation, the conductivity of the p+ poly-Si gate was improved and the boron penetration was suppressed. These phenomena can be attributed to the enhancement of the grain growth in the As-preamorphized film and the retarded boron diffusion during annealing. DC conductivity of the film preamorphized by As+ ions at 180 keV and 4×1014 cm-2 was about 36% higher than that of the B implanted film without As preimplantation, in spite of the carrier compensation effect. Cross-sectional transmission electron microscopy (XTEM) micrographs show the bilayer with an upper layer of larger grain size (approximately 0.22 μm) and a lower layer of smaller grain size (approximately 0.03 μm) in the preamorphized and annealed film.
引用
收藏
页码:2468 / 2473
相关论文
共 50 条
  • [41] HIGH-QUALITY GATE-OXIDE FILMS FOR LOW-TEMPERATURE FABRICATED POLY-SI TFTS
    SUYAMA, S
    OKAMOTO, A
    SHIRAI, S
    SERIKAWA, T
    RAPID THERMAL ANNEALING / CHEMICAL VAPOR DEPOSITION AND INTEGRATED PROCESSING, 1989, 146 : 301 - 306
  • [42] Fabricated poly-Si thin film transistor with anodizing al film using nanoindentation
    Han, Jin-Woo
    Kim, Jong-Yeon
    Kan, Hee-Jin
    Moon, Hyun-Chan
    Choi, Seong-Ho
    Park, Kwang-Bum
    Kim, Tae-Ha
    Seo, Dae-Shik
    IEEE NMDC 2006: IEEE NANOTECHNOLOGY MATERIALS AND DEVICES CONFERENCE 2006, PROCEEDINGS, 2006, : 698 - +
  • [43] Hydrogenation of p+ poly-Si by Al2O3 nanolayers prepared by atomic layer deposition
    Theeuwes, Roel J.
    Melskens, Jimmy
    Beyer, Wolfhard
    Breuer, Uwe
    Gutjahr, Astrid
    Mewe, Agnes A.
    Macco, Bart
    Kessels, Wilhelmus M. M.
    JOURNAL OF APPLIED PHYSICS, 2023, 133 (14)
  • [45] SUPPRESSION OF BORON PENETRATION IN PMOS BY USING BRIDE GETTERING EFFECT IN POLY-SI GATE
    LIN, YH
    LEE, CL
    LEI, TF
    CHAO, TS
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1995, 34 (2B): : 752 - 756
  • [46] EFFECTS OF P+-IMPLANTED POLY-SI ELECTRODES ON THE GATE DIELECTRIC CHARACTERISTICS OF THIN OXIDES
    CHENG, HC
    CHEN, WS
    NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION B-BEAM INTERACTIONS WITH MATERIALS AND ATOMS, 1991, 55 (1-4): : 216 - 219
  • [47] The influence of gate bias on LDD resistance in poly-Si TFTs
    Chiu, Chao-Chien
    Hsu, Yuan-Jiun
    Lu, Chia-Hui
    Shih, Ching-Chieh
    Lin, Kun-Chih
    Gan, Feng-Yuan
    IDW '07: PROCEEDINGS OF THE 14TH INTERNATIONAL DISPLAY WORKSHOPS, VOLS 1-3, 2007, : 1873 - 1876
  • [48] WSi2/poly-Si gate etching using a TiON hard mask
    Tabara, S
    Hibino, S
    Nakaya, H
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1998, 37 (4B): : 2354 - 2358
  • [49] Gate capacitance characteristics of a poly-Si thin film transistor
    Bindra, S
    Haldar, S
    Gupta, RS
    SOLID-STATE ELECTRONICS, 2004, 48 (05) : 675 - 681
  • [50] Boron diffusion and penetration in ultrathin oxide with poly-Si gate
    Cao, M
    Voorde, PV
    Cox, M
    Greene, W
    IEEE ELECTRON DEVICE LETTERS, 1998, 19 (08) : 291 - 293