共 50 条
- [1] Algorithms for low power and high speed FIR filter realization using differential coefficients [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1997, 44 (06): : 488 - 497
- [2] Realization of FIR Filter using High Speed, Low Power Floating Point Arithmetic Unit [J]. 2015 INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, SIGNALS, COMMUNICATION AND OPTIMIZATION (EESCO), 2015,
- [3] High speed FIR adaptive filter for Radar applications [J]. PROCEEDINGS OF THE 2016 IEEE INTERNATIONAL CONFERENCE ON WIRELESS COMMUNICATIONS, SIGNAL PROCESSING AND NETWORKING (WISPNET), 2016, : 2118 - 2122
- [4] The Implementation methods of High Speed FIR Filter on FPGA [J]. 2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4, 2008, : 2208 - 2211
- [5] A HIGH-SPEED FIR FILTER DESIGNED BY COMPILER [J]. PROCEEDINGS OF THE IEEE 1989 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1989, : 587 - 590
- [6] FPGA realization of multipurpose FIR filter [J]. PARALLEL AND DISTRIBUTED COMPUTING, APPLICATIONS AND TECHNOLOGIES, PDCAT'2003, PROCEEDINGS, 2003, : 912 - 915
- [7] Modified CSM for FIR Filter Realization [J]. PROCEEDINGS OF INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE AND DATA ENGINEERING, 2018, 9 : 133 - 144
- [10] A Reconfigurable High-speed Spiral FIR Filter Architecture [J]. 2017 40TH INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS AND SIGNAL PROCESSING (TSP), 2017, : 532 - 537