Error analysis for ultra dense nanomagnet logic circuits

被引:0
|
作者
机构
[1] Shah, Faisal A.
[2] Csaba, Gyorgy
[3] Niemier, Michael T.
[4] Hu, Xiaobo S.
[5] Porod, Wolfgang
[6] Bernstein, Gary H.
来源
Shah, Faisal A. (fshah@nd.edu) | 1600年 / American Institute of Physics Inc.卷 / 117期
关键词
Magnets;
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
相关论文
共 50 条
  • [1] Error analysis for ultra dense nanomagnet logic circuits
    Shah, Faisal A.
    Csaba, Gyorgy
    Niemier, Michael T.
    Hu, Xiaobo S.
    Porod, Wolfgang
    Bernstein, Gary H.
    JOURNAL OF APPLIED PHYSICS, 2015, 117 (17)
  • [2] Systematic Design of Nanomagnet Logic Circuits
    Palit, Indranil
    Hu, X. Sharon
    Nahas, Joseph
    Niemier, Michael
    DESIGN, AUTOMATION & TEST IN EUROPE, 2013, : 1795 - 1800
  • [3] Majority Voter Full Characterization for Nanomagnet Logic Circuits
    Vacca, Marco
    Graziano, Mariagrazia
    Zamboni, Maurizio
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2012, 11 (05) : 940 - 947
  • [4] Biosequences analysis on NanoMagnet Logic
    Wang, J.
    Vacca, M.
    Graziano, M.
    RuoRoch, M.
    Zamboni, M.
    2013 INTERNATIONAL CONFERENCE ON IC DESIGN AND TECHNOLOGY (ICICDT), 2013, : 131 - 134
  • [5] Soft delay error analysis in logic circuits
    Gill, Balkaran S.
    Papachristou, Chris
    Wolff, Francis G.
    2006 DESIGN AUTOMATION AND TEST IN EUROPE, VOLS 1-3, PROCEEDINGS, 2006, : 45 - +
  • [6] Physically and Algorithmically Secure Logic Locking with Hybrid CMOS/Nanomagnet Logic Circuits
    Edwards, Alexander J.
    Hassan, Naimul
    Bhattacharya, Dhritiman
    Shihab, Mustafa M.
    Zhou, Peng
    Hu, Xuan
    Atulasimha, Jayasimha
    Makris, Yiorgos
    Friedman, Joseph S.
    PROCEEDINGS OF THE 2022 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2022), 2022, : 17 - 22
  • [7] Soft error generation analysis in combinational logic circuits
    Ding Qian
    Wang Yu
    Luo Rong
    Wang Hui
    Yang Huazhong
    JOURNAL OF SEMICONDUCTORS, 2010, 31 (09)
  • [8] LOGIC CIRCUITS THAT HEAR NO ERROR
    不详
    MACHINE DESIGN, 1970, 42 (25) : 157 - &
  • [9] Analysis of the Soft Error Susceptibility and Failure Rate in Logic Circuits
    AlQuraishi, Eman
    Al-Roomi, May
    Almukhaizim, Sobeeh
    INTERNATIONAL ARAB JOURNAL OF INFORMATION TECHNOLOGY, 2011, 8 (04) : 388 - 396
  • [10] Soft error generation analysis in combinational logic circuits附视频
    丁潜
    汪玉
    罗嵘
    汪蕙
    杨华中
    半导体学报, 2010, (09) : 141 - 146