Design of a FIR filtering core for high speed application

被引:0
|
作者
Arif, M. [1 ]
机构
[1] Department of Electronics and Communication Engineering, National Institute of Technology (Deemed University), Kurukshetra 136 119, India
关键词
10;
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
页码:331 / 334
相关论文
共 50 条
  • [31] High Speed Electrical Generators, Application, Materials and Design
    Bartolo, James Borg
    Zhang, He
    Gerada, David
    De Lillo, Liliana
    Gerada, Chris
    2013 IEEE WORKSHOP ON ELECTRICAL MACHINES DESIGN, CONTROL AND DIAGNOSIS (WEMDCD), 2013,
  • [32] PREMULTIPLICATION SCHEME FOR DIGITAL FIR FILTERS WITH APPLICATION TO MULTIRATE FILTERING
    BELLANGER, MG
    BONNEROT, G
    IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1978, 26 (01): : 50 - 55
  • [33] Technology of FIR filtering based on FPGA and application in laser gyroscope
    Li, C. (lichun_13institute@126.com), 1600, Editorial Department of Journal of Chinese Inertial Technology (21):
  • [34] BLOCK Z-TRANSFORM AND ITS APPLICATION TO FIR FILTERING
    LI, WP
    PETERSON, AM
    IEEE TRANSACTIONS ON SIGNAL PROCESSING, 1991, 39 (10) : 2335 - 2343
  • [35] Design and application of reflecting fir interferometer
    Zhou, Y
    Deng, ZC
    Yi, J
    Tang, YW
    Liu, ZT
    Shi, PL
    Pan, L
    Lou, CW
    Chen, LY
    Wang, EY
    JOURNAL OF INFRARED AND MILLIMETER WAVES, 2005, 24 (04) : 265 - 268
  • [36] Parameterized FIR filtering IP cores for reusable SoC design
    Farooq, Umar
    Saleem, Muhammad
    Jamal, Habibullah
    THIRD INTERNATIONAL CONFERENCE ON INFORMATION TECHNOLOGY: NEW GENERATIONS, PROCEEDINGS, 2006, : 554 - +
  • [37] Design of Simple and High Speed VLSI Core for the Protection of Mass Storages
    Jing, Ming-Haw
    Chen, Zih-Heng
    Chen, Jian-Hong
    Wu, Cheng-Yi
    2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4, 2008, : 1660 - 1663
  • [38] Design High Speed FIR Filter based on Complex Vedic Multiplier using CBL Adder
    Thakur, Anjali Singh
    Tiwari, Vibha
    2018 INTERNATIONAL CONFERENCE ON RECENT INNOVATIONS IN ELECTRICAL, ELECTRONICS & COMMUNICATION ENGINEERING (ICRIEECE 2018), 2018, : 559 - 563
  • [39] EFFICIENT SYSTOLIC HIGH-SPEED ARCHITECTURES FOR DELAYED MULTIPATH 2-DIMENSIONAL FIR AND IIR DIGITAL FILTERING
    KWAN, HK
    TSIM, MT
    IEE PROCEEDINGS-G CIRCUITS DEVICES AND SYSTEMS, 1990, 137 (06): : 413 - 423
  • [40] Design of high-speed, low-power, and area-efficient FIR filters
    Liacha, Ahmed
    Oudjida, Abdelkrim K.
    Ferguene, Farid
    Bakiri, Mohammed
    Berrandjia, Mohamed L.
    IET CIRCUITS DEVICES & SYSTEMS, 2018, 12 (01) : 1 - 11