Critical loop memory-aware mapping onto coarse-grained reconfigurable architecture

被引:0
|
作者
Yang, Ziyu [1 ]
Zhao, Peng [1 ]
Wang, Dawei [1 ]
Li, Sikun [1 ]
机构
[1] College of Computer, National University of Defense Technology, Changsha 410073, China
关键词
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
页码:46 / 53
相关论文
共 50 条
  • [1] Memory-Aware Loop Mapping on Coarse-Grained Reconfigurable Architectures
    Yin, Shouyi
    Yao, Xianqing
    Liu, Dajiang
    Liu, Leibo
    Wei, Shaojun
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 24 (05) : 1895 - 1908
  • [2] Memory-Aware Application Mapping on Coarse-Grained Reconfigurable Arrays
    Kim, Yongjoo
    Lee, Jongeun
    Shrivastava, Aviral
    Yoon, Jonghee
    Paek, Yunheung
    HIGH PERFORMANCE EMBEDDED ARCHITECTURES AND COMPILERS, PROCEEDINGS, 2010, 5952 : 171 - +
  • [3] Accurate constraints aware mapping on Coarse-Grained Reconfigurable Architecture
    Zhang, Peng
    Luo, Huiqiang
    Man, K. L.
    2011 NINTH IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL AND DISTRIBUTED PROCESSING WITH APPLICATIONS WORKSHOPS (ISPAW), 2011, : 39 - 44
  • [4] MapReduce inspired loop mapping for coarse-grained reconfigurable architecture
    Yin ShouYi
    Shao ShengJia
    Liu LeiBo
    Wei ShaoJun
    SCIENCE CHINA-INFORMATION SCIENCES, 2014, 57 (12) : 1 - 14
  • [5] MapReduce inspired loop mapping for coarse-grained reconfigurable architecture
    ShouYi Yin
    ShengJia Shao
    LeiBo Liu
    ShaoJun Wei
    Science China Information Sciences, 2014, 57 : 1 - 14
  • [6] Battery-Aware Task Mapping for Coarse-Grained Reconfigurable Architecture
    Yin, Shouyi
    Shi, Rui
    Liu, Leibo
    Wei, Shaojun
    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2013, E96D (12): : 2524 - 2535
  • [7] Map Reduce inspired loop mapping for coarse-grained reconfigurable architecture
    YIN ShouYi
    SHAO ShengJia
    LIU LeiBo
    WEI ShaoJun
    Science China(Information Sciences), 2014, 57 (12) : 184 - 197
  • [8] Mapping Control Intensive Kernels onto Coarse-Grained Reconfigurable Array Architecture
    Chang, Kyungwook
    Choi, Kiyoung
    ISOCC: 2008 INTERNATIONAL SOC DESIGN CONFERENCE, VOLS 1-3, 2008, : 362 - 365
  • [9] Mapping Parallel FFT Algorithm onto SmartCell Coarse-Grained Reconfigurable Architecture
    Liang, Cao
    Huang, Xinming
    IEICE TRANSACTIONS ON ELECTRONICS, 2010, E93C (03): : 407 - 415
  • [10] Mapping Parallel FFT Algorithm onto SmartCell Coarse-Grained Reconfigurable Architecture
    Liang, Cao
    Huang, Xinming
    2009 20TH IEEE INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS, 2009, : 231 - 234