Generic arithmetic units for high-performance FPGA designs

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作者：
Accelerated Computing Division, EM Photonics Inc., 51 E. Main St., Newark, DE 19711, United States [1 ]
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来源：
WSEAS Trans. Math. | 2007年 / 1卷 / 166-169期
关键词：
Computer aided design - Computer hardware - Computer programming languages - Computer simulation - Mobile computing;
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摘要：
As PLD applications expand to include high-speed computing, the number of data types required grows commensurately. Current applications of programmable devices require operations on various integer, fixed-point, and floating-point precisions, in both real and complex (a+jb) formats. Moreover, simulating large, high-precision systems that include arithmetic units requires significant time. In this paper, we present a method of VHDL programming that addresses the growing number of data types and simulation time to allow for rapid development and simulation of mathematical-based hardware designs.
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