Development of high-speed and low-power microprocessors using superconductive circuits

被引：0
|
作者：
Yamanashi, Yuki [1 ]
Yoshikawa, Nobuyuki [2 ]
Tanaka, Masamitsu [3 ]
Fujimaki, Akira [3 ]
机构：
[1] Interdisciplinary Research Center, Yokohama National University, 79-5, Tokiwadai, Hodogaya-ku, Yokohama 240-8501, Japan
[2] Department of Electrical and Computer Engineering, Yokohama National University, 79-5, Tokiwadai, Hodogaya-ku, Yokohama 240-8501, Japan
[3] Faculty of Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603, Japan
来源：
IEEJ Transactions on Fundamentals and Materials | 2008年 / 128卷 / 06期
关键词：
Low power electronics;
D O I：
10.1541/ieejfms.128.369
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：369 / 372
相关论文
共 50 条
  • [21] HIGH-PERFORMANCE ALINAS/GAINAS HBTS FOR HIGH-SPEED, LOW-POWER DIGITAL CIRCUITS
    FARLEY, CW
    CHANG, MF
    ASBECK, PM
    WANG, KC
    SHENG, NH
    PIERSON, R
    NUBLING, RB
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1989, 36 (11) : 2601 - 2602
  • [22] High-speed low-power and low-power supply voltage dynamic comparator
    Xu, Daiguo
    Xu, Shiliu
    Chen, Guangbing
    ELECTRONICS LETTERS, 2015, 51 (23) : 1914 - 1915
  • [23] Low-Power High-Speed Signal Processing: From Iterative Algorithm to Analog Circuits
    Teich, Werner G.
    2017 11TH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING AND COMMUNICATION SYSTEMS (ICSPCS), 2017,
  • [24] High-Speed Low-Power MCML Nanometer Circuits with Near-Threshold Computing
    Hu, Jianping
    Ni, Haiyan
    Xia, Yinshui
    JOURNAL OF COMPUTERS, 2013, 8 (01) : 129 - 135
  • [25] Limited switch dynamic logic circuits for high-speed low-power circuit design
    Belluomini, W
    Jamsek, D
    Martin, AK
    McDowell, C
    Montoye, RK
    Ngo, HC
    Sawada, J
    IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 2006, 50 (2-3) : 277 - 286
  • [26] HIGH-SPEED BIPOLAR LOGIC-CIRCUITS WITH LOW-POWER CONSUMPTION FOR LSI - A COMPARISON
    RANFFT, R
    REIN, HM
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1982, 17 (04) : 703 - 712
  • [27] GAAS LOW-POWER INTEGRATED-CIRCUITS FOR A HIGH-SPEED DIGITAL SIGNAL PROCESSOR
    SINGH, HP
    SADLER, RA
    IRVINE, JA
    GORDER, GE
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1989, 36 (02) : 240 - 249
  • [28] A Survey on Different Modules of Low-Power High-Speed Hybrid Full Adder Circuits
    Saraswat, Vivek
    Kumar, Ankur
    Pal, Pratosh Kumar
    Nagaria, R. K.
    2017 4TH IEEE UTTAR PRADESH SECTION INTERNATIONAL CONFERENCE ON ELECTRICAL, COMPUTER AND ELECTRONICS (UPCON), 2017, : 323 - 328
  • [29] Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits
    Nikoubin, Tooraj
    Bahrebar, Poona
    Pouri, Sara
    Navi, Keivan
    Iravani, Vaez
    VLSI DESIGN, 2010, 2010
  • [30] High-speed low-power logic gates using floating gates
    Rodríguez-Villegas, E
    Quintana, JM
    Avedillo, MJ
    Rueda, A
    2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL V, PROCEEDINGS, 2002, : 389 - 392
12345