A Hardware Chaotic Neural Network with Gap Junction Models

被引：0
|
作者：
Yamaguchi, Takuto [1 ]
Saeki, Katsutoshi [2 ]
机构：
[1] Postdoctoral Course in Electronic Engineering, Graduate School of Science and Engineering, Nihon University, 7-24-1, Narashinodai, Chiba, Funabashi,274-8501, Japan
[2] Electronic Engineering, Science and Technology, Nihon University, 7-24-1, Narashinodai, Chiba, Funabashi,274-8501, Japan
来源：
IEEJ Transactions on Electronics, Information and Systems | / 144卷 / 07期
关键词：
Compilation and indexing terms; Copyright 2025 Elsevier Inc;
D O I：
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摘要：
Associative processing - Efficiency - Small-world networks
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页码：580 / 587
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