共 50 条
- [41] An architecture-driven metric for simultaneous placement and global routing for FPGAs 37TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2000, 2000, : 567 - 572
- [42] Timing driven placement reconfiguration for fault tolerance and yield enhancement in FPGAs EUROPEAN DESIGN & TEST CONFERENCE 1996 - ED&TC 96, PROCEEDINGS, 1996, : 165 - 169
- [43] Timing-Driven Placement for FPGAs with Heterogeneous Architectures and Clock Constraints PROCEEDINGS OF THE 2021 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2021), 2021, : 1564 - 1569
- [45] HJ-hPl: Hierarchical Mixed-Size Placement Algorithm with Priori Wirelength Estimation PROCEEDINGS OF THE 9TH INTERNATIONAL CONFERENCE FOR YOUNG COMPUTER SCIENTISTS, VOLS 1-5, 2008, : 947 - 952
- [47] TeSHoP : A Temperature Sensing based Hotspot-Driven Placement Technique for FPGAs 2016 26TH INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS (FPL), 2016,
- [48] RippleFPGA: A Routability-Driven Placement for Large-Scale Heterogeneous FPGAs 2016 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD), 2016,
- [49] A timing-driven algorithm for leakage reduction in MTCMOS FPGAs PROCEEDINGS OF THE ASP-DAC 2007, 2007, : 678 - +