共 50 条
- [1] A Complete Design-for-Test Scheme for Reconfigurable Scan Networks JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2023, 38 (6): : 603 - 621
- [2] A Complete Design-for-Test Scheme for Reconfigurable Scan Networks Journal of Electronic Testing, 2022, 38 : 603 - 621
- [3] Successful implementation of scan-based design-for-test EE-EVALUATION ENGINEERING, 1996, 35 (09): : 45 - &
- [5] Secure scan: A design-for-test architecture for crypto chips 42ND DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2005, 2005, : 135 - 140
- [6] Design-for-test of asynchronous Networks-On-Chip PROCEEDINGS OF THE 2006 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, 2006, : 163 - +
- [7] A Framework for Configurable Joint-Scan Design-for-Test Architecture JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2021, 37 (5-6): : 593 - 611
- [9] Test Strategies for Reconfigurable Scan Networks 2016 IEEE 25TH ASIAN TEST SYMPOSIUM (ATS), 2016, : 113 - 118
- [10] A Framework for Configurable Joint-Scan Design-for-Test Architecture Journal of Electronic Testing, 2021, 37 : 593 - 611