High-Precision Built-In Phase Noise Measurement Circuit With a Hybrid ΔΣ Time-to-Digital Converter for SoC Clocking Applications

被引：0

作者：

Choi, Jihun ^{[1
]}

Na, Sangwook ^{[1
]}

Kim, Hojin ^{[2
]}

Roh, Hyungdong ^{[2
]}

Cho, Youngjae ^{[2
]}

Choi, Michael ^{[2
]}

Choo, Min-Seong ^{[1
]}

Roh, Jeongjin ^{[1
]}

机构：

[1] Hanyang University, Department of Electrical Engineering, Ansan,15588, Korea, Republic of

[2] Samsung Electronics, Foundry IP Development Team, Hwaseong,18448, Korea, Republic of

来源：

IEEE Transactions on Circuits and Systems II: Express Briefs | 2024年 / 71卷 / 11期

关键词：

Compendex;

D O I：

10.1109/TCSII.2024.3435434

中图分类号：

学科分类号：

摘要：

Bandpass filters - Clocks - CMOS integrated circuits - Continuous time systems - Frequency converters - Locks (fasteners) - Operational amplifiers - Phase comparators - Phase locked loops - Phase noise - System-on-chip - Timing circuits - Timing jitter

引用

页码：4613 / 4617

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