Low-jitter fast-locked 10.9−12.0 GHz charge-pump phase-locked loop

被引：0
|
作者：
Zhan, Yongzheng [1 ]
Li, Rengang [1 ]
Li, Tuo [1 ]
Zou, Xiaofeng [1 ]
Zhou, Yulong [1 ]
Hu, Qingsheng [2 ,3 ]
Li, Lianming [3 ]
机构：
[1] Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Limited Company, Jinan,250101, China
[2] Institute of RF- and OE-ICs, Southeast University, Nanjing,210096, China
[3] School of Information Science and Engineering, Southeast University, Nanjing,210096, China
来源：
Zhejiang Daxue Xuebao (Gongxue Ban)/Journal of Zhejiang University (Engineering Science) | 2024年 / 58卷 / 11期
关键词：
Phase locked loops;
D O I：
10.3785/j.issn.1008-973X.2024.11.010
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：2290 / 2298
相关论文
共 50 条
  • [1] A Low-Jitter Fast-Locked All-Digital Phase-Locked Loop With Phase-Frequency-Error Compensation
    Ho, Yung-Hsiang
    Yao, Chia-Yu
    IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 24 (05) : 1984 - 1992
  • [2] A Low-Jitter Phase-Locked Loop Based on a Charge Pump Using a Current-Bypass Technique
    Moon, Yongsam
    JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2014, 14 (03) : 331 - 338
  • [3] BIST for measuring clock jitter of charge-pump phase-locked loops
    Hsu, Jen-Chien
    Su, Chauchin
    IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2008, 57 (02) : 276 - 285
  • [4] A Low-Jitter Supply-Regulated Charge Pump Phase-Locked Loop with Built-In Test and Calibration
    San-Um, Wimol
    Masayoshi, Tachibana
    2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, 2010, : 1931 - 1934
  • [5] An analysis of charge-pump phase-locked loops
    Wang, ZD
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2005, 52 (10) : 2128 - 2138
  • [6] Analysis of charge-pump phase-locked loops
    Hanumolu, PK
    Brownlee, M
    Mayaram, K
    Moon, UK
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2004, 51 (09) : 1665 - 1674
  • [7] On the Stability of Charge-Pump Phase-Locked Loops
    Homayoun, Aliakbar
    Razavi, Behzad
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2016, 63 (06) : 741 - 750
  • [8] A Low-Jitter Self-Biased Phase-Locked Loop for SerDes
    Yuan, Heng-zhou
    Guo, Yang
    Liu, Yao
    Liang, Bin
    Guo, Qian-cheng
    Tan, Jia-wei
    2016 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2016, : 59 - 60
  • [9] Design of a programmable CMOS Charge-Pump for phase-locked loop synthesizers
    de Jesus Gomez-Cruz, Jorge
    Sanchez-Hernandez, Fernando
    Guillermo Gomez-Mora, Luis
    Juarez-Hernandez, Esdras
    Martinez-Guerrero, Esteban
    2012 IBEROAMERICAN CONFERENCE ON ELECTRONICS ENGINEERING AND COMPUTER SCIENCE, 2012, 3 : 235 - 240
  • [10] A Power and Area Efficient CMOS Charge-Pump Phase-Locked Loop
    Hua, Siliang
    Yang, Hua
    Liu, Yan
    Li, Quanquan
    Wang, Donghui
    2012 IEEE 11TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT-2012), 2012, : 1043 - 1045
12345