Impacts of Cavity Thickness and Insulating Material on Dielectric Modulated Trench Junction-less Double Gate Field Effect Transistor for Biosensing Applications

被引:0
|
作者
Bhattacherjee, Swagata [1 ]
Dhar, Palasri [2 ]
Roy, Sunipa [2 ]
机构
[1] Department of Physics, JIS College of Engineering, Kalyani, India
[2] Department of Electronics and Communication Engineering, Guru Nanak Institute of Technology, Center of Nanoscience and Technology Research, Kolkata, India
关键词
D O I
10.2174/0126661454274311231011070702
中图分类号
学科分类号
摘要
Gate dielectrics
引用
收藏
页码:513 / 521
相关论文
共 37 条
  • [21] Dual metal-double gate tunnel field effect transistor with mono/hetero dielectric gate material
    Prateek Jain
    Vishwa Prabhat
    Bahniman Ghosh
    Journal of Computational Electronics, 2015, 14 : 537 - 542
  • [22] Power and delay analysis of dielectric modulated dual cavity Junctionless double gate field effect transistor based label-free biosensor
    Jana, Gargi
    Sen, Dipanjan
    Debnath, Papiya
    Chanda, Manash
    COMPUTERS & ELECTRICAL ENGINEERING, 2022, 99
  • [23] One-Transistor Dynamic Random-Access Memory Based on Gate-All-Around Junction-Less Field-Effect Transistor with a Si/SiGe Heterostructure
    Yoon, Young Jun
    Lee, Jae Sang
    Kim, Dong-Seok
    Lee, Sang Ho
    Kang, In Man
    ELECTRONICS, 2020, 9 (12) : 1 - 12
  • [24] A new Junction-Less Tunnel Field-Effect Transistor with a SiO2/HfO2 stacked gate oxide for DC performance improvement
    Eyvazi, Kaveh
    Karami, Mohammad Azim
    2020 28TH IRANIAN CONFERENCE ON ELECTRICAL ENGINEERING (ICEE), 2020, : 77 - 80
  • [25] An Analytical Modeling and Simulation of Dual Material Double Gate Tunnel Field Effect Transistor for Low Power Applications
    Samuel, T. S. Arun
    Balamurugan, N. B.
    JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY, 2014, 9 (01) : 247 - 253
  • [26] Analytical modelling of dielectric engineered strained dual-material double-gate-tunnelling field effect transistor
    Dash, Dinesh Kumar
    Saha, Priyanka
    Sarkar, Subir Kumar
    IET CIRCUITS DEVICES & SYSTEMS, 2019, 13 (07) : 1039 - 1048
  • [27] Double-gate Si junction-less n-type transistor for high performance Cu-BEOL compatible applications using 3D sequential integration
    Vandooren, A.
    Witters, L.
    Vecchio, E.
    Kunnen, E.
    Hellings, G.
    Peng, L.
    Inoue, F.
    Li, W.
    Waldron, N.
    Mocuta, D.
    Collaert, N.
    2017 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S), 2017,
  • [28] Improved Switching Performance of a Novel Auxiliary Gate Raised Dual Material Hetero-Dielectric Double Gate Tunnel Field Effect Transistor
    Brahmdutta Dixit
    Reshmi Maity
    N. P. Maity
    Silicon, 2022, 14 : 6761 - 6767
  • [29] Improved Switching Performance of a Novel Auxiliary Gate Raised Dual Material Hetero-Dielectric Double Gate Tunnel Field Effect Transistor
    Dixit, Brahmdutta
    Maity, Reshmi
    Maity, N. P.
    SILICON, 2022, 14 (12) : 6761 - 6767
  • [30] A novel source material engineered double gate tunnel field effect transistor for radio frequency integrated circuit applications
    Dassi, Minaxi
    Madan, Jaya
    Pandey, Rahul
    Sharma, Rajnish
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2020, 35 (10)