An ultra-low-supply-voltage ultra-low-power subthreshold SRAM bitcell design

被引:0
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作者
机构
[1] [1,2,Bai, Na
[2] Feng, Yue
[3] You, Xiaohu
[4] Shi, Longxing
来源
Shi, L. (lxshi@seu.edu.cn) | 1600年 / Southeast University卷 / 43期
关键词
Energy utilization - Integrated circuit design - Static random access storage;
D O I
10.3969/j.issn.1001-0505.2013.02.008
中图分类号
学科分类号
摘要
An ultra-low-supply-voltage ultra-low-power subthreshold static random access memory (SRAM) bitcell with a self-adaptive leakage current cutoff scheme is proposed for ultra-low-supply-voltage (200 mV) applications. To achieve enough robustness in those supply voltage, the differential sensing method and the reconfigurable operating mode are adopted. With self-adaptive leakage current cutoff scheme, the proposed design can reduce the leakage current of dynamic and static operation without increasing the dynamic energy consumption and the performance loss. A 256×32 bit SRAM array is fabricated based on IBM 130 nm CMOS technology. And testing results demonstrate that the total power (dynamic power and standby power) consumption of SRAM at 200 mV is 0.13 μW which is only 1.16% of conventional 6T SRAM.
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