A GA-based buffer allocation algorithm for networks-on-chip architecture

被引:0
|
作者
School of Electronic Information, Wuhan University, Wuhan 430079, China [1 ]
不详 [2 ]
机构
来源
Beijing Youdian Daxue Xuebao | 2009年 / 6卷 / 19-23期
关键词
Network-on-chip;
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
页码:19 / 23
相关论文
共 50 条
  • [21] Fairness-Oriented Switch Allocation for Networks-on-Chip
    Wang, Zicong
    Chen, Xiaowen
    Li, Chen
    Guo, Yang
    2017 30TH IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC), 2017, : 304 - 309
  • [22] Buffer planning for application-specific networks-on-chip design
    YIN ShouYi1
    2 National Laboratory for Information Science and Technology
    Science China(Information Sciences), 2009, (04) : 547 - 558
  • [23] Buffer planning for application-specific networks-on-chip design
    ShouYi Yin
    LeiBo Liu
    ShaoJun Wei
    Science in China Series F: Information Sciences, 2009, 52 : 547 - 558
  • [24] Buffer planning for application-specific networks-on-chip design
    YIN ShouYiLIU LeiBo WEI ShaoJun Institute of MicroelectronicsTsinghua UniversityBeijing China National Laboratory for Information Science and TechnologyTsinghua UniversityBeijing China
    ScienceinChina(SeriesF:InformationSciences), 2009, 52 (04) : 547 - 558
  • [25] Buffer planning for application-specific networks-on-chip design
    Yin ShouYi
    Liu LeiBo
    Wei ShaoJun
    SCIENCE IN CHINA SERIES F-INFORMATION SCIENCES, 2009, 52 (04): : 547 - 558
  • [26] Evaluation of energy and buffer aware application mapping for networks-on-chip
    Celik, Cokun
    Bazlamacci, Cuneyt F.
    MICROPROCESSORS AND MICROSYSTEMS, 2014, 38 (04) : 325 - 336
  • [27] A stochastic framework for communication architecture evaluation in networks-on-chip
    Murgan, T
    Ortiz, AG
    Petrov, M
    Glesner, M
    SCS 2003: INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2, PROCEEDINGS, 2003, : 253 - 256
  • [28] A networks-on-chip architecture design space exploration - The LIB
    Liu, Peng
    Xia, Bingjie
    Xiang, Chunchang
    Wang, Xiaohang
    Wang, Weidong
    Yao, Qingdong
    COMPUTERS & ELECTRICAL ENGINEERING, 2009, 35 (06) : 817 - 836
  • [29] Scalable Networks-on-Chip Interconnected Architecture for Astrocyte-Neuron Networks
    Liu, Junxiu
    Harkin, Jim
    Maguire, Liam P.
    McDaid, Liam J.
    Wade, John J.
    Martin, George
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2016, 63 (12) : 2290 - 2303
  • [30] GA-Based Optimal Allocation of Sensor Resources
    Chen, Jin-xia
    Chen, De-feng
    Wang, Yan
    2013 IEEE INTERNATIONAL CONFERENCE ON MICROWAVE TECHNOLOGY & COMPUTATIONAL ELECTROMAGNETICS (ICMTCE), 2013, : 395 - 397