Performance explorations of multi-core network on chip router

被引：0
|
作者：
Saravanakumar, U. [1 ]
Rangarajan, R. [2 ]
机构：
[1] Department of Electronics and Communication Engineering, PSG College of Technology, Coimbatore, India
[2] Department of Electronics and Communication Engineering, Indus College of Engineering, Coimbatore, India
来源：
International Journal of Simulation: Systems, Science and Technology | 2012年 / 13卷 / 01期
关键词：
Energy utilization - Servers - Field programmable gate arrays (FPGA) - Routers - Distributed computer systems - Programmable logic controllers - Computer architecture - Network architecture;
D O I：
10.5013/IJSSST.a.13.01.04
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：36 / 42
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