An integrated 1.5 Gbit/s optical receiver fabricated in standard SiGe BiCMOS process

This paper presents a monolithically integrated optical receiver front-end circuit realized with IBM 0.18 μm SiGe BiCMOS process. The receiver front-end circuit includes two regulated cascode trans-impedance amplifiers (RGC-TIAs), four limiting amplifiers and an output buffer. The RGC-TIAs with SiGe heterojunction bipolar transistor (HBT) input stage reduce the input resistance, and isolate the effects of the parasitic photodetector capacitance, thus effectively expand the bandwidth of the optical receiver. The simulated results indicate that the optical receiver terminated with 50 Ω load resistance and 10 pF load capacitance has a trans-impedance gain of 76.67 dB and a -3 dB bandwidth of 2.1 GHz. The experimental results demonstrate that the fabricated receiver achieves a 72.2 dB trans-impedance gain with a 1.2 GHz bandwidth, and a data rate of 1.5 Gbit/s is successfully realized at a bit-error rate of 10-9. Total chip power including the output buffer is 44 mW from 1.8 V supply, and the chip area including pads is 800 μm×370 μm.