86 Gbit/s SiGe receiver module with high sensitivity for 160 x 86 Gbit/s DWDM system

被引：25
|
作者：
Dümler, U
Möller, M
Bielik, A
Ellermeyer, T
Langenhagen, H
Walthes, W
Mejri, J
机构：
[1] Univ Saarland, Dept Elect & Circuits, Saarbrucken, Germany
[2] MICRAM Microelect GmbH, Bochum, Germany
[3] Infineon Technol AG, Munich, Germany
来源：
ELECTRONICS LETTERS | 2006年 / 42卷 / 01期
关键词：
D O I：
10.1049/el:20063141
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A 86 Gbit/s SiGe receiver chip with an on-chip phase-locked loop and a preamplifier is presented. The chip is mounted and measured in a module assembly with RF-connectors. At the intended system data rate of 86 Gbit/s bit-error-free operation at a high input sensitivity of 50 in V-pp is demonstrated. With all external clock, high-speed capability is proven by error-free operation up to 100 Gbit/s.
引用
收藏
页码：21 / 22
页数：2
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