An improved AES S-box based on fibonacci numbers and prime factor

被引：1
|
作者：
Mohamed, Kamsiah [1 ]
Ali, Fakariah Hani Hj Mohd [1 ]
Ariffin, Suriyani [1 ]
Zakaria, Nur Hafiza [2 ]
Pauzi, Mohd Nazran Mohammed [3 ]
机构：
[1] Faculty of Computer and Mathematical Sciences, Universiti Teknologi MARA, Shah Alam, Selangor,40450, Malaysia
[2] Faculty of Science and Technology, University Sains Islam Malaysia, Nilai, Negeri Sembilan,71800, Malaysia
[3] Faculty of Engineering and Life Sciences, Universiti Selangor, Bestari Jaya, Selangor,45600, Malaysia
来源：
International Journal of Network Security | 2018年 / 20卷 / 06期
关键词：
D O I：
10.6633/IJNS.201811.20(6).21
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：1206 / 1214
相关论文
共 50 条
  • [31] NEW ARCHITECTURE OF LOW AREA AES S-BOX/INV S-BOX USING VLSI IMPLEMENTATION
    Ahmad, Nabihah
    JURNAL TEKNOLOGI, 2016, 78 (5-9): : 21 - 25
  • [32] “S-Box” Implementation of AES Is Not Side Channel Resistant
    Ashokkumar C.
    Bholanath Roy
    M. Bhargav Sri Venkatesh
    Bernard L. Menezes
    Journal of Hardware and Systems Security, 2020, 4 (2) : 86 - 97
  • [33] ON THE LARGEST PRIME FACTOR OF THE k-FIBONACCI NUMBERS
    Bravo, Jhon J.
    Luca, Florian
    INTERNATIONAL JOURNAL OF NUMBER THEORY, 2013, 9 (05) : 1351 - 1366
  • [34] Cryptographic strength evaluation of AES s-box variants
    Waqas U.
    Afzal S.
    Mir M.A.
    Yousaf M.
    International Journal of Information and Computer Security, 2021, 14 (3-4): : 263 - 280
  • [35] Reducing the Power Consumption of the AES S-Box by SSC
    Zhang, Jinyi
    Zuo, Qinghua
    Zhang, Tianbao
    2007 INTERNATIONAL CONFERENCE ON WIRELESS COMMUNICATIONS, NETWORKING AND MOBILE COMPUTING, VOLS 1-15, 2007, : 2226 - 2229
  • [36] A petite and power saving design for the AES S-Box
    Wamser, Markus Stefan
    Holzbaur, Lukas
    Sigl, Georg
    2015 EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD), 2015, : 661 - 667
  • [37] Hardware Implementation of AES Algorithm with Logic S-box
    Oukili, Soufiane
    Bri, Seddik
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2017, 26 (09)
  • [38] An AES S-box to increase complexity and cryptographic analysis
    Liu, JM
    Wei, BD
    Cheng, XG
    Wang, XM
    19th International Conference on Advanced Information Networking and Applications, Vol 1, Proceedings: AINA 2005, 2005, : 724 - 728
  • [39] A very compact "Perfectly Masked" S-box for AES
    Canright, D.
    Batina, Lejla
    APPLIED CRYPTOGRAPHY AND NETWORK SECURITY, PROCEEDINGS, 2008, 5037 : 446 - +
  • [40] FPGA Implementation of Combined S-Box and InvS-Box of AES
    Rao, M. Rajeswara
    Sharma, R. K.
    2017 4TH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING AND INTEGRATED NETWORKS (SPIN), 2017, : 566 - 571
12345